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Who used the chip MT9 172?
Basic performance characteristics of MT9 172

1. Using adaptive echo cancellation technology, full-duplex digital transmission is realized on a single pair of lines.

2. Optional line transmission rate: 80Kbit/s or160 kbit/s; The maximum transmission distance can reach 4 kilometers (ordinary twisted pair).

3. The system adopts ST-BUS, which is compatible with the 2B+D data format of ISDN.

4. Have the ability of frame synchronization and clock extraction.

5. When acting, transmit data transparently.

6. Single power supply of +5V is adopted, and the power consumption is very low (typical value is about 50mW).

Chip package form and pin function description

MT9 172 has three packaging forms, such as DIP, PLCC and SSOP. Here, taking the 22-pin dual in-line package (DIP) as an example, the pin function is introduced.

Structure and working principle of MT9 172

The internal structure block diagram of MT9 172 chip mainly includes several circuits, such as sending interface, receiving interface, line interface (LIN, LOUT), echo canceller, scrambler/descrambler, two-phase differential encoder/decoder, receiving and sending timing and control circuit, and clock phase locked loop. The transmitting and receiving interfaces include data/voice interfaces (DSTi/Di, DSTo/Do and DV ports for short) and control/data interfaces (CDSTi/CDi, CDTO/CDO and CD ports for short). DV port is used to transmit speech coding or other user data information, and CD port is used to transmit various control information and low-speed data.

MT9 172 has many working modes, which can be set through mode selection terminals MS0~MS2. "Modem" and "Digital Network" (hereinafter referred to as "DN") are two main working modes. In DN mode, the line outputs ISDN 2B+D data. At this time, DV port and CD port are standard ST-BUS;; . In modem mode, DV port and CD port are transparent serial data streams. In addition, its working mode is divided into master/slave and single/dual port. The time reference signal and frame synchronization clock of the master chip are provided by a high-stability external clock source, while the slave chip is directly extracted from the line. In the data transmission chain, one end must work in the master mode and the other end must work in the slave mode. When the dual port works, both DV port and CD port are effective; When working in a single port, all information is transmitted through the DV port, and the CD port is invalid.

The following introduces the working principles of DN and MODEM mode, and the functions of DV port and CD port.

1.DN mode

In DN mode, MT9 172 receives ST-BUS data streams (including information of bearer channels B 1 and B2, control channel C and low-speed data channel) from DV port and CD port at a rate of 2.048Mbit/s, and sends them to the line in serial mode. The information sent to the line includes B channel data, D0 bit (80Kbit/s) or D0 and D 1 bit (160Kbit/s) of D channel, and auxiliary bit (HK) and synchronization bit (SYNC) of C channel. Synchronization bits distinguish different frames by alternating 1 and 0, and are used for. In order to avoid wrong synchronization, the data is scrambled by the pre-scrambler according to a predetermined polynomial related to synchronization bits. In addition, different scramblers are used in the master-slave algorithm, which makes the algorithm satisfy the orthogonal relationship between the received near-end and far-end data streams, thus ensuring the echo canceller to work correctly and improving the quality of full-duplex data transmission. The scrambled NRZ data are differentially coded and biphase coded respectively, filtered by a band-pass filter, and sent to the line from the LOUT terminal. The discreteness and attenuation of the two-phase differential coded signal are very small, which can shorten the response time of the line, reduce the crosstalk between symbols and help the clock extraction at the receiving end.

The signal received by the LIN terminal is the superposition of multiple signals, including useful signals from the far end, unnecessary signals such as transmitted signals, various reflected signals, and delay of near-end signals. The received signal first passes through a pre-canceller consisting of a summing amplifier and a low-pass filter to partially cancel the near-end signal (this function can also be disabled by setting the "Precan" pin to a high level). After pre-cancellation, the received signal is subtracted from the echo estimated value from the echo canceller, and the difference between them is divided into two paths: one path is input to the echo canceller as an error signal, and the echo estimated value is correspondingly increased or decreased according to the sign of the internal error signal of the echo canceller, and the new estimated value is stored back in RAM; The other path is shaped by the comparator and sent to the two-phase receiver for decoding, and then sent to the descrambler and descrambler for inverse transformation according to the original transformation polynomial to obtain the original data and extract the synchronization bits from it; The receiving interface separates the channels and outputs the corresponding data to the corresponding ports according to the time sequence of different channels.

Step 2: Method

In this mode, two ports need to work together, the D channel and two B channels no longer exist, and the line port is still 80Kbit/s or 160Kbit/s, but there is no synchronization bit overhead and only transparent data transmission. DV port can transmit all data, while CD port can only carry C channel data. The transmitted and received data are synchronized with TCK and RCK clocks respectively. When the CLD signal goes low, the data representing the CD port is valid. It is only used to load or lock the input and output of C channel, and has nothing to do with the data of DV port.

3. The working sequence is 3. DV port and CD port

In DN mode, DV port works in the ST-BUS frame structure of 2.048Mbit/s, with 32 slots in each frame and 8 bits in each slot (high bit priority). In dual-port mode, channels B 1 and B2 are transmitted through DV port, while channels C and D are transmitted through CD port. When working at 80Kbit/s, only 0 of the 32 available time slots of DV port is used for transmission channel B1; At 160Kbit/s, in addition to time slot 0, time slot 16 is occupied, carrying channels B 1 and B2 respectively.

The CD port contains a C channel and a D channel. The C channel is used to transmit control information and status information between the chip and the system. D channel is used to send and receive signaling and low-speed data between lines and systems. The D channel is only valid in DN mode, and its rate can be selected (8, 16 or 64Kbit/s), which is controlled by the "DINB" bit in the control register. Data timing relationship of optical disk ports.

In single-port operation, B 1, B2, C and D channels are all transmitted through DV port, and CD port is disabled. Generally, channel D is transmitted in slot 0, while channels C, B 1 and B2 occupy slot 1, slot 2 and slot 3, respectively. When the rate is 80Kbit/s, B2 does not exist.

When the data frame structure diagram sent to the line is 80Kbit/s, naturally there is no B2 channel, and "HK" and "D 1" bits are not transmitted.

A data modem implemented with.

Using MT9 172 chip to design data modem, the working mode must be set correctly. Fig. 7 is an actual hardware connection block diagram of the baseband data modem. The modem works in dual-port mode. When the mode control terminal MS2 is grounded through switch K or+5V ... MS2 is grounded, MT9 172 works in main mode. When MS2 is connected to +5V, MT9 172 works in slave mode. In the master mode, the 10.24MHz clock should be provided by an external high-stability digital phase-locked loop, while in the slave mode, the 10.24MHz crystal can be directly connected to OSC 1 and OSC2 terminals.

When working, you need to initialize MT9 172. Just write "0000000" or "000 10000" into the control register through the CD port of MT9 172. When all the control words are zero, the data transmission rate is selected as 80Kbit/s (64Kbit/s is used to transmit the data of DTE), and the pre-scrambler/descrambler is shielded; When the control word is "000 10000", the data transmission rate is 160Kbit/s (where 128Kbit/s is used to transmit DTE data).