The difference is that CPLD is mainly centered on programmable logic macro cell (LMC) and consists of programmable interconnected matrix cells. FPGA usually includes three types of programmable resources: programmable logic function block, programmable I/O block and programmable interconnection.

With the increasing density of complex programmable logic devices (CPLD), designers of digital devices are flexible and easy to design on a large scale, and products can enter the market quickly. Many designers have found CPLD easy to use. Predictable timing and high speed, but in the past, due to the limitation of CPLD density, they had to turn to FPGA and ASIC.

Application of CPLD

The appearance of reconfigurable PLD (Programmable Logic Device) based on SRAM (Static Random Access Memory) has created conditions for system designers to dynamically change the logic function of PLD in the running circuit. PLD uses SRAM cells to store configuration data. These configuration data determine the internal interconnection and logical function of PLD. Changing these data will also change the logical function of the device.

Because the data of SRAM is volatile, it must be stored in nonvolatile memory such as EPROM, EEPROM or FLASH ROM except PLD devices, so that the system can be downloaded to the SRAM unit of PLD at an appropriate time, thus realizing ICR (in-circuit reconfiguration) in the circuit.