1. wafer processing procedure: the main work of this procedure is to make circuits and electronic components (such as transistors, capacitors, logic switches, etc. ) on the wafer. The processing procedure is usually related to the product type and the process used, but the general basic step is to clean the wafer properly first, then carry out oxidation and chemical vapor deposition on its surface, and then carry out repeated steps such as coating, exposure, development, etching, ion implantation and metal sputtering.
2. Wafer needle testing process: after the last process, small cells, namely crystal grains, are formed on the wafer. Generally speaking, in order to facilitate testing and improve efficiency, products of the same variety and specifications are made on the same wafer; However, we can also make several products with different varieties and specifications as needed. After detecting the electrical characteristics of each die with a probe instrument and marking the unqualified dies, the wafer is cut and divided into individual dies, and then sorted into different trays according to their electrical characteristics, and the unqualified dies are discarded.
3. Assembly process: a single die is fixed on a chip base made of plastic or ceramic, and some lead terminals etched on the die are connected with pins protruding from the base for connection with external circuit boards. Finally, cover the plastic cover and seal it with glue. Its purpose is to protect the crystal grain from mechanical scratch or high temperature damage. At this point, an integrated circuit chip (that is, those black or brown rectangular pieces with many pins or leads on two or four sides that we can see in the computer) is completed.
4. Testing process: The last process of chip manufacturing is testing, which can be divided into general testing and special testing. The former is to test the electrical characteristics of the packaged chip in various environments, such as power consumption, operating speed, withstand voltage and so on. The tested chips are classified into different grades according to their electrical characteristics. Special test is to take out some chips from similar specifications and varieties according to the technical parameters of customers' special needs, and do targeted special tests to see if they can meet customers' special needs, so as to decide whether they need to design special chips for customers. The qualified products are labeled with specifications, models, factory date, etc., and packaged before leaving the factory. Chips that fail the test are classified as degraded products or waste products according to the parameters they reach.
Basic raw materials for making chips
Basic materials for making chips: silicon and metal materials (aluminum is the main metal material with good electromigration characteristics. Copper interconnection technology can reduce the chip area, and at the same time, because the resistance of copper conductor is lower, the current on it is faster.
Preparatory stage of chip manufacturing
After the collection of basic raw materials is completed, some of these raw materials need to be pretreated. As the most important raw material, the treatment of silicon is very important. First of all, silicon raw materials should be chemically purified to reach the level of raw materials used in semiconductor industry. In order to make these silicon raw materials meet the processing needs of integrated circuit manufacturing, they must be shaped. This step is completed by melting silicon raw materials and then injecting liquid silicon into a large high-temperature time-sensitive container.
Then, the raw materials are melted at high temperature. In order to meet the requirements of high-performance processors, the whole silicon raw material must be high-purity monocrystalline silicon. Then the silicon raw material is taken out from the high-temperature container by rotation and stretching, and a cylindrical silicon ingot is made at this time. Judging from the technology currently used, the circular cross-sectional diameter of silicon ingot is 200 mm, and it is quite difficult to increase the cross-sectional area without changing the characteristics of silicon ingot, but it can be realized as long as enterprises are willing to invest a lot of money in research. The factory built by Intel to develop and produce 300mm silicon ingots cost about $3.5 billion. With the success of new technology, Intel can manufacture more complex and powerful integrated circuit chips, and the factory of 200mm silicon ingot will also cost $654.38+$50 million. The manufacturing process of the chip is introduced from the slicing of silicon ingot.
After making the silicon ingot and ensuring that it is an absolute cylinder, the next step is to slice the cylindrical silicon ingot. The thinner the slice, the less material is used, and naturally more processor chips can be produced. Slices should also be mirrored to ensure that the surface is absolutely smooth, and then check for distortion or other problems. The quality inspection in this step is particularly important, which directly determines the quality of the finished chip.
The new chip should be doped with some substances to make it a real semiconductor material, and then transistor circuits representing various logic functions should be engraved on it. Doped substance atoms enter the gaps between silicon atoms, and atomic forces interact, thus making silicon raw materials have the characteristics of semiconductors. Nowadays, multi-choice CMOS process (complementary metal oxide semiconductor) is used in semiconductor manufacturing. The word complementary represents the interaction between N-type MOS transistor and P-type MOS transistor in semiconductor. N and p represent the negative electrode and the positive electrode in electronic technology respectively. In most cases, the P-type substrate is formed by slicing and doping chemicals, and the logic circuit engraved on it should be designed according to the characteristics of nMOS circuit. This kind of transistor has higher space utilization rate and more energy saving. At the same time, in most cases, it is necessary to limit the appearance of pMOS transistors as much as possible, because in the later stage of the manufacturing process, N-type materials need to be implanted into P-type substrates, which will lead to the formation of pMOS transistors.
After the dosing work is completed, the standard section is completed. Then each slice is heated in a high temperature furnace, and a silicon dioxide film is formed on the surface of the slice by controlling the heating time. By closely monitoring the temperature, air composition and heating time, the thickness of the silicon dioxide layer can be controlled. In Intel's 90 nm manufacturing process, the width of the gate oxide is as small as 5 atoms. This gate circuit is also a part of transistor gate circuit. The function of transistor gate circuit is to control the electron flow in it. By controlling the gate voltage, the electron flow is strictly controlled regardless of the voltages at the input and output ports. The last step of preparation is to cover the photosensitive layer on the silicon dioxide layer. This material layer is used for other control applications in the same layer. This layer of material has a good photosensitive effect after drying, and can be dissolved and removed by chemical method after the lithography process.
photoetching
Lithography is a very complicated step in the process of chip manufacturing. Why do you say that? Photolithography process is to use a certain wavelength of light to carve a corresponding notch on the photosensitive layer, thus changing the chemical characteristics of the material there. This technology is very strict with the wavelength of the light used, which requires the use of short-wavelength ultraviolet rays and lenses with large curvature. The etching process is also affected by stains on the wafer. Every step of etching is a complicated and delicate process. The amount of data needed to design each process can be measured by 10GB, and the etching steps required to manufacture each processor are more than 20 steps (etching one layer at a time). Moreover, if the etching map of each layer is magnified many times, it can be compared with the map of new york plus suburbs, or even more complicated. Imagine reducing the whole map of new york to a chip with an actual area of only 100 square millimeter, then the structure of this chip is so complicated.
When all these etching jobs are completed, the wafer is turned over. Short wavelength light shines on the photosensitive layer of the wafer through the hollowed-out gap on the timely template, and then the light and the template are removed. By chemically removing the exposed photosensitive layer material, silicon dioxide is immediately generated below the hollow position.
mix
After removing the remaining photosensitive layer material, what remains is the silicon dioxide layer filled with grooves and the exposed silicon layer below this layer. After this step, another silicon dioxide layer is completed. Then, another polysilicon layer with a photosensitive layer is added. Polysilicon is another type of gate circuit. Because metal raw materials (therefore called metal oxide semiconductors) are used here, polysilicon allows the gate circuit to be established before the transistor queue port voltage takes effect. At the same time, the photosensitive layer is etched by short wavelength light passing through the mask. After another etching, all the required gate circuits have been basically formed. Then, the exposed silicon layer is subjected to ion bombardment by chemical means, and the purpose here is to generate an N channel or a P channel. This doping process produces all transistors and their circuit connections. No transistor has an input and an output, and both ends are called ports.
Repeat this process.
Starting from this step, layers will be added continuously, silicon dioxide layers will be added, and then photolithography will be carried out once. Repeat these steps, and then a multi-layer three-dimensional architecture will appear, which is the embryonic state of the processor you are currently using. Conductive connection between layers is realized by metal coating technology.
In the next few weeks, we need to test the wafers one by one, including the electrical characteristics of the wafers to see if there are any logical errors, if so, which floor, and so on. Then, each defective chip unit on the wafer will be tested separately to determine whether the chip has special processing requirements.
Then, the whole wafer is cut into individual processor chip units. In the initial test, those units that failed the test will be abandoned. These cut chip units will be packaged in some way, so that they can be successfully inserted into the motherboard of a certain interface specification. After the chip packaging process is completed, many products need to be re-tested to ensure that the previous manufacturing process is not omitted, and the products fully meet the specifications and have no deviation.