The signal to be measured enters the CP end of the counter after shaping, and then the LE and R of the counter are controlled by the standard clock generated above (it should be 1), that is, the number of pulses of the signal to be measured, that is, the frequency of the signal to be measured, is read in a fixed time period.
CD4553 is a three-digit decimal counter, and two-stage cascade can realize a six-digit decimal counter, so the maximum frequency is 99999.
The left three digits show high position and the right three digits show low position.