Power-off storage problem of password lock of single chip microcomputer
This is 2k E2PROM, and it is ok if the password is divided into several bytes. 13 14=0x0522, with high order 0x05 and state 0x22, which are stored in two addresses of AT24c02 respectively, preferably consecutive addresses. When reading, they are taken out separately, and the high position is shifted to the left by 8 bits, and the status is complete password.