(
F 10MB，
Reset,
500KB
);
Enter F 10MB and reset;
Output F500KB
reg F500KB
reg[7:0]j；
////////////////////////////////////
Always @ (pose edge f10mb)
begin
If (! Reset)
begin
j & lt= 0;
end
other
begin
If (j== 19)
j & lt= j； //I translated this according to your above procedure. Please have a good look.
else if(j==29)
j & lt=0;
other
j & lt= j+ 1；
end
end
Always @ (pose edge f10mb)
begin
If (! Reset)
begin
F500KB & lt= 0;
end
other
begin
if(j== 19 || j==29)
F500KB & lt= ~ f 500 kb； //I translated this according to your above procedure. Please have a good look.
other
F500KB & lt= F500KB
end
end
Terminal module
Pay attention to two points in the future: 1. Do not assign values to the same register at different times.
2. Don't always assign values to different registers in the same register.
This code is of high quality, no matter why.