Thesis proposal

I. Overview

With the development of digital communication technology, digitalization has become the inevitable trend of information communication technology development and the foundation of information society. The baseband transmission mode of digital communication is the most basic transmission mode of digital communication, such as direct transmission of pcm signals over a long distance through relay, transmission of computer data through twisted pair in LAN, etc. This system that directly transmits baseband signals without using carrier modem equipment or devices is called baseband transmission system. For the whole baseband system, the generation, multiplexing and coding of baseband signals and the processing of baseband signals at the receiving end are very important. Pulse modulation is an important modulation transmission mode in digital baseband system. There are three basic methods to convert a digital sequence into a pulse sequence: changing the amplitude, position and period of the pulse. The corresponding modulation methods are called pulse amplitude modulation, pulse position modulation and pulse duration modulation. Among them, pulse position modulation (PPM) is a modulation method that uses the relative position of pulses to transmit information, which was first proposed by Pierce JR and applied to space communication. In optical communication, this modulation method can achieve the highest data transmission rate with the minimum average optical power. The advantage of PPM is that it only needs to control the pulse position according to the data symbol, and does not need to control the pulse amplitude and polarity, so it is convenient to realize modulation and demodulation and has low complexity. PPM is especially suitable for submarine communication, local computer infrared communication and other occasions that need low average power to transmit information. PPM signal modulation is widely used in modern communication frontier technical fields such as optical communication and ultra-wideband mobile communication. The modulation and reception of PPM signal plays a vital role in the performance of communication system.

At present, the chip-based design method, which uses EDA tools and programmable devices to realize system functions by designing chips, is gradually replacing the traditional design method. Field programmable gate array (FPGA) is a new type of high-performance programmable logic device developed on the basis of complex programmable logic device (CPLD). It can complete extremely complex sequential and combinational logic circuit functions, and is suitable for high-speed and high-density high-end digital logic circuit design. It has the characteristics of large scale, small investment in the development process, repeatable programming and erasing, intelligent development tools and powerful functions, and meets the needs of the development of programmable logic devices.

Compared with the traditional implementation method, the PPM modulation and demodulation system implemented on FPGA improves the design efficiency and work efficiency of the PPM modulation and demodulation system.

Second, the research content

The main content of the whole design process is to realize a PPM baseband system on FPGA by programming with VHDL language, which can realize the functions of PPM signal generation and PPM signal demodulation. This paper mainly uses Quartus II tool software to write VHDL program to realize PPM baseband system, and downloads the program to test on the experimental board of programmable logic devices.

The principle of PPM is to divide a period of time into m equal parts, each equal part is called a time slot, and a pulse is sent out in a time slot in a frame. This frame time is a PPM signal, which includes m time slots and a guard time. Let the transmission time of a frame be t, and the information transmission rate is bit/s.

The main functions of the PPM modulation and demodulation system are: modulating the input digital signal to obtain a narrow pulse PPM signal, and transmitting it on the channel; The receiver demodulates the received PPM signal to recover the digital signal.

PPM modulation is actually a process of counting output pulses. The frequency division ratio of the slot divider is controlled by the pulse width control signal, and the frame divider counts the slot signals. When the count value is compared with the modulation data, the pulse is output when they are equal, and the frame signal is output when the count value is equal to the modulation number. The output PPM pulse signal and frame signal are output to the demodulator through the output module. At the same time, the time slot signal is also output to the demodulator. The PPM demodulator counts the time slot signals and outputs the count value when the PPM pulse appears. The function of the frame signal is to clear the counter. The output module outputs the demodulated data.

Third, the realization method and expected goal

The model structure of PPM modulation and demodulation system in the design process is shown in figure 1. The system mainly includes two parts: modulation part: serial-parallel conversion, binary frequency divider, comparator and narrow pulse shaper; Demodulation part: shaping circuit, clock extraction circuit, pulse position detection circuit and decoder.

Figure 1 PPM modulation and demodulation system principle structure

The serial/parallel converter in figure 1 is equivalent to a binary adder. Let the input signal be A, and the two-bit output signals be o 1 and o2. See table 1 for the function of adding a and a.

Table 1 serial/parallel conversion menu

a

o 1

oxygen

1

1

The binary frequency divider in figure 1 is a 4-bit frequency divider, which outputs high and low binary signals. The comparator is used to compare the high bit output by the frequency divider with the high bit output by the adder, and the low bit output by the frequency divider with the low bit output by the adder. When they are the same, output "1", otherwise it is "0". Since the 2-bit output of the frequency divider corresponds to four states (00,0 1,1,1), each state is output sequentially, that is, different states correspond to different time positions, while the serial-parallel converter outputs two states, and the two states output by the serial-parallel converter (00,/) In this way, output information with different starting positions of output pulses depending on the signal level can be obtained. The pulse shaper delays the output signal of the comparator by one clock cycle through the D flip-flop and inverts it with the output signal of the comparator to obtain a narrow pulse PPM signal. Demodulation part: The shaping circuit is composed of D flip-flop and inverter, which is used to shape the received PPM signal. The function of pulse position detection is to invert the signal, count high-level clocks, and detect the position of signal 0 1 transition. Then the longest pulse and the detected shortest pulse are added to obtain the position information of the real signal jump. Finally, the decoder converts the high-low level jump information of the data signal into a data signal with varying level.

The most important thing in the design process is the connection design between various parts. Among them, it is difficult to write the program of each component, realize the shaping circuit and prevent the signal from burr. Because the main principle of PPM modulation is relatively simple, the emphasis is on programming and system implementation.

The software environment of the whole design process is Quartus of Altera Company. Second, software. The program is written in VHDL language. Altera？ Quartus? II design software provides a complete multi-platform design environment, which can directly meet specific design requirements and provide a comprehensive design environment for programmable chip system (SOPC). Quartus software package is an upgraded version of MAX+plusⅱ Ⅱ and the fourth generation development software of Altera Company. Quartus provides convenient design input mode, fast compilation and intuitive device programming.

refer to

[1] Realistic technology. Application development technology and engineering practice of CPLD/FPGA. Beijing: People's Posts and Telecommunications Publishing House, 2005

Ren et al. Design of embedded system based on FPGA. Xi 'an: xidian university Press, 2004.

[3] Fu Yongqing. VHDL language and its application. Beijing: Higher Education Press, 2005.

[4] SOPC experimental instruction of Beijing Encyclopedia Sunac Technology Co., Ltd.. Beijing: 2005

Modeling and design of digital communication system based on CPLD/FPGA. Beijing: Electronic Industry Press, 2005.

[6] Yite Technology. CPLD/FPGA。 Application system design and product development. Beijing: People's Posts and Telecommunications Publishing House

[7][ Italian] Maria gabriela di Benedetto Greenow Giancora. Fundamentals of ultra-wideband radio. Beijing: Electronic Industry Press, 2005.