Integrated circuits are divided into TTL and CMOS according to the properties of transistors. TTL is good at speed, and CMOS is famous for its low power consumption. Among them, CMOS circuit has become the most widely used integrated circuit because of its excellent characteristics. When using CMOS integrated circuits in electronic manufacturing, in addition to carefully reading product descriptions or related materials, we should also pay attention to the following issues:
1, power problem
The working voltage of (1) CMOS integrated circuits is generally 3- 18V, but when analog applications (such as pulse oscillation and linear amplification) have gates, the minimum voltage should not be lower than 4.5V Because of the wide working voltage of CMOS integrated circuits, CMOS integrated circuits with unstable power supply circuits can also work normally, but the output impedance, working speed and power consumption of devices working at different power supply voltages are different.
(2) (2) The power supply voltage of CMOS integrated circuit must be within the specified range, and it cannot be overvoltage or inverted. Because in the manufacturing process, many parasitic diodes are naturally formed, as shown in figure 1, which is an inverter circuit. Under normal voltage, these diodes are in reverse bias, which has no effect on logic function. However, due to these parasitic diodes, once the power supply voltage is too high or the voltage polarity is reversed, the circuit will be damaged.
2. The problem of driving ability
In order to improve the driving ability of CMOS circuits, in addition to selecting buffers with strong driving ability, several similar circuits of the same chip can be connected in parallel to improve the driving ability, and then the driving ability can be increased to n times (n is the number of parallel gates). As shown in figure 2.
3. Problems at the input end
(1) Handling of redundant input. The input terminal of CMOS circuit is not allowed to float, because floating will make the potential uncertain and destroy the normal logic relationship. In addition, when suspended, the input impedance is high, which is easy to be disturbed by external noise, causing the circuit to fail, and it is also easy to cause the power grid to induce static electricity and breakdown. Therefore, the redundant inputs of AND gate and NAND gate should be connected to high level, or the redundant inputs of OR gate and NOR gate should be connected to low level. If the working speed of the circuit is not high and the power consumption does not need special consideration, the redundant input terminal can be connected in parallel with the user terminal.
(2) Protection when the input terminal is connected with the long conductor. In application, sometimes the input terminal needs to be connected with long wires, and the long input wires must have large distributed capacitance and inductance, which is easy to form LC oscillation, especially when the input terminal has negative voltage, which is easy to destroy the protection diode in CMOS. The protection method is to connect a resistor at the input terminal, as shown in Figure 3, where r = vdd/ 1ma.
(3) Electrostatic protection of input end. Although various CMOS inputs have anti-static protection measures, they still need to be treated with care. In storage and transportation, it is best to pack with metal containers or conductive materials, not with chemical materials or chemical fiber fabrics that are easy to generate electrostatic high voltage. During assembly and commissioning, tools, instruments, work tables, etc. Should be well grounded. In order to prevent the operator from being hurt by electrostatic interference, if it is not suitable to wear nylon or chemical fiber clothes, it is best to touch the ground with hands or tools before touching the manifold block. When straightening, bending or manually welding equipment leads, the equipment used must be well grounded.
(4) The rising and falling time of the input signal is not easy to be too long, otherwise, on the one hand, it is easy to cause false triggering, which makes the equipment lose its normal function, on the other hand, it will also cause great losses. For the 74HC series, it is limited to less than 0.5us If this requirement cannot be met, Schmidt trigger device is needed for input shaping, and the shaping circuit is shown in Figure 4.
(5) The high input impedance of 5)CMOS circuit makes the device vulnerable to external interference, shock and electrostatic breakdown. Therefore, in order to protect the oxide layer of CMOS tube from breakdown, a diode protection circuit is generally connected to its internal input terminal, as shown in Figure 5.
Where r is about 1.5-2.5 kω. With the introduction of input protection network, the input impedance of the device has decreased, but it is still above108 Ω. This also brings some limitations to the application of the circuit:
(a) Over-current protection of input circuit. The current tolerance of the protection diode at the input of CMOS circuit is generally 1mA? When excessive transient input current (exceeding 10mA) may occur, input protection resistors should be connected in series. For example, when the internal resistance of the input signal is small, or the lead is long, or the input capacitance is large, it is easy to generate a large transient input current when switching the power supply. At this time, the input protection resistor must be connected. If vdd = 10V, the current limiting resistance is 10kω.
(b) The input signal must be between VDD and VSS to prevent the diode from burning out due to excessive forward bias current. Therefore, when working or testing, you must operate in the order of first turning on the power supply, then adding the signal, then turning off the signal, and then turning off the power supply. When installing, changing the connection and pulling out, the power supply must be cut off to prevent the components from being damaged by large induction or impact.
(c) Because the instantaneous energy absorbed by the protection circuit is limited, too large instantaneous signal and too high electrostatic voltage will make the protection circuit fail. Therefore, when welding, the soldering iron must be reliably grounded to prevent leakage from penetrating the input end of the device. Generally, when in use, the soldering iron can be welded by using the residual heat after power failure, and its grounding feet should be welded first.
(d) It is necessary to prevent a large resistor from being connected in series at the terminal of VDD or VSS, so as to prevent the protective diode from being instantly turned on and damaging the device due to the voltage drop on the resistor during circuit switching.
4.CMOS interface circuit.
(1)CMOS circuit is connected with operational amplifier. When connected with an operational amplifier, if the operational amplifier uses a dual power supply, CMOS uses another independent power supply, that is, the circuit shown in Figure 6. In the circuit, VD 1 and VD2 are clamping protection diodes, so that the input voltage of CMOS is between 10V and ground. The resistor of15kΩ can not only be used as the current limiting resistor of CMOS, but also protect the diode. If the operational amplifier uses a single power supply and is the same as the power supply used by CMOS, it can be directly connected.
(2) 2) Connection between CMOS and TTL circuits. TTL circuit and CMOS circuit are often mixed in the circuit. Because the power supply voltage, input, output level and load capacity of these circuits are different from each other, the connection between them must be through level conversion or current conversion circuit, so that the logic level output by the former device can meet the requirements of the latter device for input level, and the device must not be damaged. The interface circuit of logic devices should mainly pay attention to two issues: level matching and output capability, which should be considered in combination with the power supply voltage of the devices. There are two situations that can be explained here:
(A)TTL to CMOS connection. When driving CMOS circuit with TT L circuit, because CMOS circuit is a voltage-driven device, the required current is small, so there will be no problem in current driving ability, mainly the problem of voltage driving ability. The minimum output high level of TTL circuit is 2.4 V, while the input high level of CMOS circuit is generally higher than 3.5 V, which makes the logic levels of the two circuits incompatible. For this reason, the circuit shown in Figure 7 can be adopted, and a resistor R (pull-up resistor) is connected between the output end of TTL and the power supply to raise the level of TTL to above 3.5V.
If OC gate drive is adopted, the circuit shown in Figure 8 can be adopted. Where r is its external resistance. The value of r is generally 1-4.7kω.
(B) CMOS to TTL connection. The output logic level of CMOS circuit is compatible with the input level of TTL circuit, but the driving current of CMOS circuit is small and it cannot directly drive TTL circuit. For this reason, CMOS/TTL special interface circuits, such as CMOS buffer CC4049, can be used. The high-level output current behind the buffer can meet the requirements of TTL circuit, and the low-level output current can reach 4mA. Realize the connection between CMOS circuit and TTL circuit, as shown in Figure 9. It should be noted that there are many forms of interface circuits between CMOS and TTL circuits, which should be selected according to specific conditions in practice.
5, the protection of the output
The output terminal of (1)MOS device is not allowed to be short-circuited with power supply or ground, otherwise the MOS tube of the output stage will be damaged due to overcurrent.
(In CMOS circuit, except for the three-terminal output device, the output terminals of two devices are not allowed to be connected in parallel, because the parameters of different devices are inconsistent, which may lead to the simultaneous conduction of NMOS and PMOS devices, resulting in large current. However, in order to increase the driving ability of the circuit, it is allowed to use similar circuits in parallel on the same chip.
When there is a large capacitive load at the output end of CMOS circuit, the surge current flowing through the output tube is large, which is easy to cause circuit failure. Therefore, a current limiting resistor must be connected in series between the output terminal and the load capacitor to limit the transient surge current below 10mA.