Experiment 4 Trigger and Counter Experiment 5 The logic function and test of pulse generation and shaping circuit experiment 1 logic gate 1. Experimental purpose 1. Master the shape and logic functions of TTL series and CMOS series. 2. Be familiar with the test methods of various gate parameters.
LS00 is four 2-input NAND gate integrated chips. If an AND gate is formed, the result will be negated once, that is, the output will pass through the NAND gate once. If it is not a gate, the two inputs are combined into one and used for one purpose, that is, the input signal is input from both input terminals at the same time, and the output terminal gets a non-gate signal.
I'm sorry to tell you that only one 74XX00 can't do XOR.
1. Put any one of raw garlic, raw walnut peel and raw tea on the allergic part and chew it repeatedly to make its juice act on the allergic part to