AD7730 is a high-resolution A/D converter launched by the American ADI Company. It has dual-channel differential analog input, 24-bit no missing codes, 21-bit effective resolution, and ±0.0018% linear error. and other characteristics. Due to the use of Σ-Δ conversion technology, the quantization noise is moved outside the frequency band of A/D conversion. Therefore, the AD7730 is particularly suitable for A/D conversion of low-frequency signals within a wide dynamic range and has excellent anti-noise performance. One of its applications is to use the AD7730 in an engine fuel consumption measuring instrument to directly interface with the load cell and microcontroller, and the microcontroller reads the A/D conversion value to calculate the average engine fuel consumption and display the output.

1 Working principle and internal structure of AD7730

1.1 Principle of ∑-ΔA/D converter

Working principle of ∑-ΔA/D converter As shown in Figure 1, it samples the analog input signal at k times the oversampling frequency kfs (fs sampling frequency), and moves most of the quantization noise within the fs/2 signal bandwidth outside the A/D conversion band through the noise shaping circuit Between fs/2 and kfs/2, the circuit quantization noise is reduced to the original 1/root K. The analog low-pass filter only filters out noise above kfs/2, so it is necessary to extract useful signals within the frequency band through digital filters and sampling extraction circuits, filter out quantization noise and useless signals outside the frequency band, and improve the signal-to-noise ratio and effectiveness. resolution. The principle of sampling extraction should satisfy Nyquist sampling law, and the sampling frequency should be greater than twice the signal frequency (fs>2fa). The digital filter of the Σ-Δ A/D converter can be set by the user through software programming, so that the A/D converter can make the best choice between data output rate, peak-to-peak resolution, and noise figure. 1.2 Internal structure of AD7730

The internal structure of AD7730 is shown in Figure 2. It contains a 24-bit Σ-Δ A/D converter, two sets of programmable digital filters, and thirteen on-chip control registers, a correction microprocessor, two differential analog input channels and a bidirectional serial input and output interface.

1.2.1 Differential analog input

AD7730 has two differential analog input channels. By writing the control bits of the mode register, the sensor analog input range can be set to 0~ +10mV, 0~+20mV, 0~+40mV, 0~+80mV (four unipolar signals) and ±10mV, ±20mV, ±40mV, ±80mV (four bipolar signals), and can respond to different The amplitude of the sensor input signal realizes range conversion. Before the output of the multiplexer MUX is added to the on-chip programmable gain amplifier (PGA), it must first be summed with the output of the on-chip 6-bit DAC to ensure that the input signal is within the allowable range of the PGA (the maximum DAC output can Cancel offsets up to ±77.5mV over the analog input signal range).

1.2.2 Serial interface

The writing settings and conversion structure reading of the AD7730 working mode are all completed by operating the corresponding on-chip registers through the serial interface. The serial clock pulse SCLK is a shift pulse that controls A/D serial data transmission. The status flag RDY indicates the status of the AD7730 data register. A/D conversion results, calibration coefficients, working modes, and data output rates are completed through serial read and write operations on the two data lines DIN and DOUT. Figure 3 is the read and write cycle timing of the AD7730. The serial data written to the AD7730 must first be written to the input shift register. When the clock logic pin POL is high level, the microcontroller bit operation write instruction is executed, and the data is transferred to the DIN serial data input terminal of the AD7730 at the falling edge of the SCLK clock; at the rising edge of the SCLK clock, the data is latched to the input shift in the register. When all the bits specified in the shift register are written, the contents of the input shift register are transferred to the specified on-chip register. When the read operation of the AD7730 register is started, the contents of the corresponding on-chip register are transferred to the output shift register. When the clock logic pin POL is high level, at the falling edge of the SCLK clock, the data is serially output from the output shift register to the DOUT port for latching; at the rising edge of the SCLK clock, the microcontroller bit operation read instruction is executed, and the data at the DOUT port is Read into the microcontroller through serial shifting.