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Principle of frequency counter clearing and holding circuit

4.2.3 Simple digital frequency meter circuit design A digital frequency meter is an instrument that uses numbers to display the frequency of the measured signal. The measured signal can be a sine wave, square wave or other periodically changing signal. If equipped with appropriate sensors, a variety of physical quantities can be tested, such as the frequency of mechanical vibration, rotational speed, frequency of sound, and product piece count, etc. Therefore, digital frequency meter is a widely used instrument. 1. Design purpose 1. Understand the basic principles of digital frequency meter measurement frequency and measurement period; 2. Be proficient in the design and debugging methods of digital frequency meters and methods of reducing measurement errors. 2. Design tasks and requirements: Design a simple digital frequency meter to measure the frequency of a given signal and display it in decimal numbers. The specific indicators are: 1. Measuring range: 1HZ—9.999KHZ, gate time 1s; 10 HZ—99.99KHZ , gate time 0.1s; 100 HZ-999.9KHZ, gate time 10ms; 1 KHZ-9999KHZ, gate time 1ms; 2. Display mode: four-digit decimal number 3. When the frequency of the measured signal exceeds the measurement range, an alarm will occur. Three , Basic principles and circuit design of digital frequency meter The so-called frequency is the number of times a periodic signal changes within unit time (1s). If the number of repeated changes of this periodic signal measured within a certain time interval T is N, then its frequency can be expressed as fx=N/T. Therefore, the signal can be amplified and shaped, and then the number of signals per unit time can be accumulated by a counter, and then the measurement results can be decoded, displayed, and output. This is the so-called frequency measurement method. It can be seen that the digital frequency meter mainly consists of amplification and shaping circuit, gate circuit, counter circuit, latch, time base circuit, logic control, decoding and display circuit. The overall structure is shown in Figure 4-2-6: Figure 4-2- 6 Digital frequency meter schematic diagram It can be seen from the schematic diagram that the measured signal Vx is transformed into the pulse signal I required by the counter through the amplification and shaping circuit, and its frequency is the same as the frequency fx of the measured signal. The time base circuit provides a standard time reference signal II. The square wave time base signal II with a fixed width T is used as an input end of the gate to control the opening time of the gate. The measured signal I is input from the other end of the gate, and the frequency of the measured signal is fx. , gate width T, if the number of pulses counted by the counter during the gate time is N, then the frequency of the measured signal fx=N/THz. It can be seen that the gate time T determines the measurement range. It is selected by the gate time base selection switch. If T is larger, the measurement accuracy will be higher. If T is smaller, the measurement accuracy will be lower. Select the gate time according to the measured frequency to control the measurement range. In the entire circuit, the time base circuit is the key. Whether the pulse width of the gate signal is accurate directly determines whether the measurement result is accurate. The logic control circuit has two functions: one is to generate the latch pulse IV to stabilize the numbers on the display; It generates clear "0" pulse V, causing the counter to start counting from zero for each measurement. 1. Amplification and shaping circuit The amplifying and shaping circuit can use transistors 3DGl00 and 74LS00, of which 3DGl00 constitutes an amplifier to amplify periodic signals with an input frequency of fx, such as sine waves, triangle waves, etc. The NAND gate 74LS00 forms a Schmitt trigger, which shapes the output signal of the amplifier into a rectangular pulse. 2. Time base circuit The function of the time base circuit is to generate a standard time signal, which can be generated by an oscillator composed of 555. If the time accuracy is required to be high, a crystal oscillator can be used. The time base circuit composed of 555 timer includes two parts: pulse generation circuit and frequency dividing circuit. (1) The 555 multivibrator circuit generates time base pulses. The reference circuit using 555 to generate 1000HZ oscillation pulses is shown in Figure 4-2-7. The resistance parameters can be obtained from the oscillation frequency calculation formula f=1.43/((R1+2R2)*C). (2) Frequency division circuit Since this design requires four gate times of 1s, 0.1s, 10ms, and 1ms, the 555 oscillator generates a 1000HZ pulse signal with a period of 1ms. The other three periodic gate signals need to be divided by frequency division. , can be obtained by dividing the frequency by 10 through the first, second and third levels respectively using 74LS90. Figure 4-2-7 555 multivibrator circuit 3. The negative transition generated by the logic control circuit at the end of the time base signal II is used to generate the latch signal IV, and the negative transition of the latch signal IV is used to generate the clear " 0” signal V. Pulse signals IV and V can be generated by two monostable flip-flops 74LSl23, and their pulse widths are determined by the time constant of the circuit. When the trigger pulse is input from terminal B, under the action of the negative transition of the trigger pulse, the output terminal Q can obtain a positive pulse, and the non-terminal Q can obtain a negative pulse. The waveform relationship exactly meets the requirements of IV and V. When the manual reset switch S is pressed, the counter clears "0". The reference circuit is shown in Figure 4-2-8 Figure 4-2-8 Digital frequency counter logic control circuit 4. Latch The function of the latch is to latch the number counted by the counter at the end of the gate time, so that the display The value of the counter at this time can be displayed stably. At the end of the gate time, the logic control circuit sends out the latch signal IV and sends the value of the counter at this time to the decoding display. The above functions can be completed by selecting 8D latch 74LS273. When the positive transition of the clock pulse CP arrives, the output of the latch is equal to the input, that is, Q=D. Thus, the output value of the counter is sent to the output terminal of the latch.

After the positive pulse ends, no matter what the value of D is, the state of the output terminal Q remains unchanged as the original state Qn. So in the counting period