In the 1970s, the chip package was basically DIP(Dual ln-line Package), which was suitable for PCB (Printed Circuit Board) perforation installation and convenient for wiring and operation. DIP package has many structural forms, including multi-layer ceramic DIP, single-layer ceramic DIP, lead frame DIP and so on. However, the packaging efficiency of DIP packaging is very low, and the ratio of chip area to packaging area is 1: 1.86, so the packaged product area is larger, and the PCB area of memory stick is fixed. The larger the package area, the fewer chips are installed in the memory, and the smaller the memory capacity. At the same time, the larger packaging area has an impact on the storage frequency, transmission rate and electrical performance. In an ideal state, the ratio of chip area to package area 1: 1 will be the best, but it can't be achieved unless it is not packaged. However, with the development of packaging technology, this ratio is getting closer and closer, and now there is a memory packaging technology of 1: 1. 14.