Current location - Plastic Surgery and Aesthetics Network - Plastic surgery and medical aesthetics - Design digital clock (electronic technology course design)
Design digital clock (electronic technology course design)
Design of digital electronic clock (composed of digital integrated circuit) ⅰ. Design purpose

1. Familiar with the pin arrangement of integrated circuits.

2. Master the logic function and usage of each chip.

3. Understand the structure of bread board and its wiring method.

4. Understand the composition and working principle of digital clock.

5. Familiar with the design and production of digital clock. Second, the design requirements

1. The design index time takes 24 hours as a cycle; Displays hours, minutes and seconds; There is a time adjustment function, which can adjust the time and minutes respectively to make it correct to the standard time; The timing process has the function of telling time. When the time reaches 5 seconds before the hour, the buzzer will tell time. In order to ensure the stability and accuracy of timing, the crystal oscillator must provide a clock time reference signal. 2. The design requires drawing the schematic diagram of the circuit (or analog circuit diagram); Selection of components and parameters; Circuit simulation and debugging; PCB file generation and printout.

3. The production needs to be assembled and debugged by itself, and problems can be found and solved.

4. Write a design report, write the whole process of design and production, and attach relevant information and drawings.

Third, the design principle and its block diagram

1. Composition of digital clock

A digital clock is actually a counting circuit that counts the standard frequency (1HZ). Since the starting time of counting cannot be consistent with the standard time (such as Beijing time), it is necessary to add a time correction circuit to the circuit, and the standard 1HZ time signal must be accurate and stable. Generally, a quartz crystal oscillator circuit is used to form a digital clock. Figure 3- 1 shows the overall block diagram of the digital clock.

Figure 3- 1 digital clock composition block diagram

(1) crystal oscillator circuit

The crystal oscillator circuit provides a stable and accurate square wave signal with the frequency of 32768 Hz for the digital clock, which can ensure the accuracy and stability of the digital clock. Crystal oscillator circuits are used for analog and digital electronic clocks.

(2) Frequency divider circuit

The frequency divider circuit divides the high-frequency square wave signal of 32768Hz by 32,768 () times to obtain a square wave signal of 1hz for the second counter to count. The frequency divider is actually a counter.

(3) Time counting circuit

The timing circuit consists of a two-bit binary counter, a fractional decimal counter and a time-bit decimal counter circuit, wherein the two-bit binary counter and the fractional decimal counter are 12 counters according to the design requirements.

(4) decoding drive circuit

The decoding drive circuit converts the 842 1BCD code output by the counter into the logic state required by the digital tube, and provides enough working current to ensure the normal operation of the digital tube.

5] Digital tube

Digital tubes usually include light emitting diode (LED) digital tubes and liquid crystal (LCD) digital tubes. This design provides LED digital tube.

2. The working principle of digital clock

1) crystal oscillator circuit

Crystal oscillator is the core of digital clock, which ensures the accuracy and stability of the clock.

The circuit shown in Figure 3-2 is a digital crystal oscillator circuit with square wave output, which is composed of CMOS NOT gates. In this circuit, the CMOS NOT-gate U 1, crystal, capacitor and resistor constitute the crystal oscillator circuit, and U2 realizes the shaping function, converting the sine wave-like waveform output by the oscillator into an ideal square wave. The output feedback resistor R 1 provides bias for the NOT gate, which makes the circuit work in the amplification region, that is, the NOT gate functions like a high-gain inverting amplifier. Capacitors C 1 and C2 form a resonant network with the crystal, control the oscillation frequency, and provide a phase shift of 180 degrees, thus forming a positive feedback network with the NAND gate and realizing the function of the oscillator. Because the crystal has high frequency stability and accuracy, the stability and accuracy of the output frequency are guaranteed.

The frequency of XTAL crystal is 32768HZ. This component is specially designed for digital clock circuit, and its frequency is low, which is beneficial to reduce the number of frequency divider stages.

It can be found from relevant manuals that C 1 and C2 are both 30pF. When higher frequency accuracy and stability are needed, a correction capacitor can also be connected and temperature compensation measures can be taken.

Because the input impedance of CMOS circuit is extremely high, the feedback resistance R 1 can be selected as10mΩ. Higher feedback resistance is beneficial to improve the stability of oscillation frequency.

Non-gate circuit can choose 74HC00.

Figure 3-2 COMS crystal oscillator

2) frequency divider circuit

Usually, the crystal oscillator output frequency of digital clock is high, so in order to get the second signal input of 1 Hz, it is necessary to divide the output signal of oscillator.

Usually, the circuit to realize the frequency divider is a counter circuit, which is generally realized by multi-level binary counters. For example, the frequency division multiple of 32768Hz oscillation signal pair 1 Hz is 32768(2 15), that is, the counter that realizes this frequency division function is equivalent to a 15-pole binary counter. Commonly used binary counters are 74hc393 and so on.

In this experiment, the frequency division circuit is composed of CD4060. CD4060 can achieve the highest frequency division in digital integrated circuits, and it also contains the NOT gate required by oscillator circuit, which is more convenient to use.

The CD 4060 is a binary counter with a count of 14, which can divide the signal of 32768Hz into 2 Hz. Its internal block diagram is shown in Figure 3-3. As can be seen from the figure, the clock input of CD 4060 has two NOT gates in series, so it can directly realize the functions of oscillation and frequency division.

Figure 3-3 Internal Block Diagram of CD 4046

3) Timing device

A timing unit sometimes has several parts, such as counting, minute counting and second counting.

The hour counting unit is generally a decimal counter, and its output is in the form of two-bit 842 1 BCD code; The unit of minute and second counting is hexadecimal counter, and its output is also 842 1 BCD code.

Generally, 10 decimal counter 74HC390 is used to realize the counting function of time counting unit. In order to reduce the number of devices used, 74hc390 can be selected, and its internal logic block diagram is shown in Figure 2.3. The device is a dual-channel 2-5- 10 asynchronous counter, and each counter provides an asynchronous clearing terminal (active high).

Figure 3-4 Internal Logic Block Diagram of 74hc390 (1/2)

The second counting unit is a decimal counter, so there is no need for decimal conversion, just connect QA with CPB (effective falling edge). CPA (falling invalid) is connected to the input signal of 1 Hz second, and Q3 can be connected to the CPA of decimal counting unit as the carry-up signal.

The second decimal counting unit is a hexadecimal counter, which needs decimal conversion. The circuit connection method of converting decimal counter into hexadecimal counter is shown in Figure 3-5, in which Q2 can be used as an uplink carry signal to connect with CPA of a multi-bit counting unit.

Figure 3-5 10 -6 counter conversion circuit

The circuit structures of fractional bit and fractional decimal counting units are exactly the same as those of fractional bit and fractional decimal counting units respectively, except that Q3 of fractional bit counting unit should be connected to CPA of fractional decimal counting unit as an uplink carry signal, and Q2 of fractional decimal counting unit should be connected to CPA of time decimal counting unit as an uplink carry signal.

The circuit structure of the hour bit counting unit is still the same as that of the second or hour bit counting unit, but it is required that the whole hour bit counting unit should be a decimal counter instead of an integer multiple of 10, so it is necessary to combine the hour bit counting unit and the decimal bit counting unit into a whole for decimal conversion. The circuit for realizing decimal counting function with a piece of 74HC390 is shown in Figure 3-6.

In addition, in the circuit shown in Figure 3-6, the remainder binary counting unit can be used to convert the 2 Hz output signal of the frequency divider into a 1 Hz signal.

Figure 3-6 12 binary counter circuit

4) decoding drive and display unit

The counter accumulates time and outputs it in the form of 842 1BCD code. The selective display decoding circuit converts the output number of the counter into the output logic and a certain current required by the digital display device. CD45 1 1 is selected as the display decoding circuit, and LED digital tube is selected as the display unit circuit.

5) Timing power supply circuit

The time when there is an error when reconnecting the power supply or walking needs to be corrected. Usually, the method to correct the time is to cut off the normal counting channel, then manually trigger the counting or add the square wave signal with higher frequency to the input end of the counting unit to be corrected, and then turn to the normal timing state.

According to the requirements, digital clocks should have minute correction and time correction functions. Therefore, we should cut off the direct counting path of division and time, and adopt a circuit that can switch between normal timing signal and correction signal at any time. Figure 3-7 shows the timing correction circuit with basic RS flip-flop.

Figure 3-7 Correction Circuit with Jitter Elimination Circuit

6) the hour circuit

Generally speaking, the clock should have the function of a time-telling circuit, that is, the digital clock will automatically tell the time a few seconds before the hour to remind you. Its function is to emit continuous or rhythmic audio sound waves, and it can also be a real-time voice prompt.

According to the requirements, the circuit should start to tell the time within 10 second before the hour, that is, when the time is between 59 minutes and 59 minutes and 59 seconds, the time-telling circuit will send out the time-telling control signal. 74HC30 is used for the time-telling circuit, and buzzer is used for the electro-acoustic device.

Fourth, components

1. experimental equipment: 5V power supply. Bread board 1. Oscilloscope multimeter. Tweezers 1. 1 scissors. The network cable is 2m/person.

* * * Six 8-segment digital tubes. CD45 1 1 6 integrated blocks. CD4060 integrated block 1 block. The 74HC390 integrated block is 3 pieces.

74HC5 1 integrated block 1 block. 74HC00 integrated block 5 yuan. 74HC30 integrated block 1 block. Five10mΩ resistors.

500 Ω resistance 14. 2 30p capacitors. 1 32.768k clock crystal. Buzzer.

2. Chip internal structure diagram and pin diagram

Figure 4- 1 7400 Four-2 Input NAND Gate Figure 4-2 CD45 1 1BCD Seven-Segment Decoder/Driver

Figure 4-3 CD4060BD Figure 4-4 74HC390D

Figure 4-5 74HC5 1D Figure 4-6 74HC30

3. The internal structure of bread board.

There are five groups of columns on the right side of bread board, and five groups below. On the left of bread board, there are four groups. In each group, X and Y columns (0- 15, 16-40, 4 1-55, ABCDE, FGHIJ and E and F) are not connected.

V. Circuit diagram of functional block

1.CD45 1 1 and LED digital tube are connected to form a CD45 1 1 driving circuit. The digital tube can be displayed from 0 to 9 to check the quality of the digital tube, as shown in Figure 5- 1. Figure 5- 1 45 1 1 driving circuit 2. An LED digital tube, a CD45 1 1, a 74HC390 and a 74HC00 are connected to form a decimal counter, and the circuit is displayed by a crystal oscillator from 0 to 9, as shown in Figure 5.

Figure 5-2 74390 decimal counter 3. Hexadecimal counter is composed of LED digital tube, CD45 1 1, 74HC390, 74HC00 and crystal oscillator. The digital tube displays from 0 to 6, as shown in Figure 5-3. Figure 5-3 74390 Hexadecimal Counter 4. Hexadecimal circuit is composed of hexadecimal circuit and decimal system. The circuit can display from 0 to 59, as shown in Figure 5-4.

Figure 5-4 Hexadecimal Circuit 5. Use two hexadecimal circuits to synthesize a dual hexadecimal circuit, with the carry between the two hexadecimal circuits, as shown in Figure 5-5.

Figure 5-5 Double sexagesimal Circuit 6. Connect CD4060, resistor and crystal oscillator to form a frequency-dividing crystal oscillator circuit, as shown in Figure 5-6.

Figure 5-6 Frequency Division Crystal Oscillator Circuit 7. Connect 74HC5 1D and 74HC00 with resistors to form a time calibration circuit, as shown in Figure 5-7.

Figure 5-7 Time Calibration Circuit

8. Connect 74HC30 and buzzer to form a time-telling circuit. See attached figure 5-8.

Figure 5-8 Hours Time Telling Circuit

9. Figure 5-9 is the general diagram of the circuit with two sexagesimal and a decimal system connected into hours, minutes and seconds.

The "24-hour digital clock" composed of ttl integrated circuit has the functions of time calibration and time telling. A 555 timer is connected to the multivibrator to generate a second pulse signal, which can be calibrated by adjusting rw. Counter 74 16 i and ii constitute a 60-bit "second" counting circuit, iii and iv constitute a "minute" counting circuit, and V and vi constitute a 24-bit "hour". The time calibration circuit adopts a bistable trigger circuit composed of NAND gate 7400, which can eliminate the influence of switching jitter. The hourly alarm circuit is composed of NAND gate 7430 and D flip-flop 7474, which rings every 1 second until the hour.