This system function provides a way to generate random numbers. When this function is called, it returns a 32-bit random number. This is a belt.

Integer of symbol.

The general usage of $random is: $ramdom% b, where b >；; 0. It gives a random number in the range of (-b+ 1):(b- 1).

The following is an example of generating random numbers:

reg[23:0]rand；

rand = $ random % 60

The above example gives a random number ranging from -59 to 59, and the following example generates a value ranging from 0 to through bit parallel operation.

Numbers between 59.

reg[23:0]rand；

rand = { $ random } % 60

Using this system function, a random pulse sequence or a pulse sequence with random width can be generated for circuit testing. In the following example,

Verilog HDL module can generate test signal source of random pulse sequence with arbitrary width, which is very useful in the design and simulation of circuit module.

Use. Students can imitate the following examples according to the needs of the exam, flexibly use the functions of $ TERM system, and write a copy similar to the actual situation

Machine pulse sequence.

[Example] `Time scale 1 nanosecond/1 nanosecond

Modular random pulse (dout);

Output [9: 0] dout;

reg dout

Integer delay 1, delay2, k;

initial

begin

# 10 dout = 0；

for(k = 0； k & lt 100; k=k+ 1)

begin

delay 1 = 20 *({ $ random } % 6)；

// delay 1 varies from 0 to 100ns.

delay 2 = 20 *( 1+{ $ random } % 3)；

//Delay 2 varies from 20 to 60ns.

# delay 1 dout = 1 & lt； & lt({ $ random } % 10)；

// 1 randomly appears in bits 0-9 of //dout, and the time of occurrence varies between 0- 100ns.

# delay 2 dout = 0；

//The pulse width varies from 20 to 60 nanoseconds.

end

end

Terminal module