Use IEEE.std _ logic _1164.all;
Use IEEE.std _ logic _ unsigned.all;
Entity dtx is
port(clk:in STD _ logic；
Data_control: in std_logic_vector(7 downto 0);
led _ addr:out STD _ logic _ vector(7 down to 0)；
seg 7 _ data:out STD _ logic _ vector(6 down to 0))；
End;
One of the architectures of dtx is
Aaaa type is an integer of array (0 to 3); -aaa value range is 0-3.
Constant a:aaaa:=(0, 1, 2, 3); -that is to say, an aaa type A is defined, with a value range of 0-3.
Type seg7_data_type is STD _ logic _ vector of array (natural range < >) (6 drops to 0); -7-bit array type seg7_data_type is defined.
Constant seg7 _ data _ table: seg7 _ data _ type (0 to 8): = ("00001011","/"
" 1 100 1 10"," 1 10 1 10 1"," 1 1 1 1 10 1", "0000 1 1 1", " 1 1 1 1 1 1 1","0000000"); -number seg7_data_table of seg7_data_type is defined, and the value range is 0-8.
Type led_addr_type is STD _ logic _ vector of array (natural range < >) (7 drops to 0); -an 8-bit array type led_addr_type is defined.
Constant led_addr_table:led_addr_type(0 to 7): = ("000000 10/","0000010", "00000 100",
"0000 1000","000 10000","00 100000","0 1000000"," 10000000"); -a led_addr_table with the number led_addr_type is defined, and the value range is 0-8.
begin
Process (clock)
Variable count: integer range 0 to 7: = 0; Define an integer count and initialize it to 0;
begin
If (clk' event and clk ='1') then-judge the trigger condition of the rising edge of the clock.
Count: = Count+1; -Count plus 1
Led _ addr < = led _ addr _ table (count); -find the corresponding count value in the array led_addr_table and assign it to the led_addr output; If count=0, led_addr=0000000 1.
If (data _ control (count) ='1') then-judge whether data _ control is valid (the syntax of this sentence should be problematic).
seg7 _ data & lt= seg 7 _ data _ table(count)； -find the value corresponding to count in the array seg7_data_table and assign it to seg7_data output; If count=0, seg7 _ data = 0000110.
other
seg7 _ data & lt= seg 7 _ data _ table(8)； -If-data_control is invalid, assign the value 0000000 to seg7_data.
End if;
End if;
End the process; End of process
End;