Input clk,//clock input, different clocks can be set externally.

Inputrst _ n,//resets low.

Input [7: 0] f,//frequency control, maximum 255.

Input [7: 0] d,//duty control word, upper limit 100.

Output PWM _ out//PWM output

);

reg[ 17:0]count； //Count

Always @ (posedgclk or negedgrst _ n) starts.

If(~rst_n) starts

Count < = 0;

end

else if(count & gt； = 17' d 100 _ 000)// Count to 100K for clearing.

Count < = 0;

other

Count < = count+f; //Accumulate the frequency value every time.

end

assign PWM _ out =(count & lt； d* 1000)？ 1:0 ; //PWM output

Terminal module

The idea is multiplication and accumulation. Think for yourself about the rest of the dip switch program.

For example, if the input clock is 100M, the frequency is set to 20, the count is 100K, and the output frequency is100m/(100k/20) = 20k, the duty ratio will be clear at a glance.

As for the input clock, use tools->; Megawizard plugin manager-> Input/output->; ALTPLL module can set PLL frequency division and frequency multiplication.