The clock signal is a pulse waveform, and the common one is a rectangular wave. Clock signals are usually sine waves when transmitted or oscillated, and then shaped into rectangular waves. Its frequency is related to signal transmission rate and circuit type. Let me give you a simple example, but not all clocks are like this. For example, the transmission rate of digital signals is equal to the clock frequency. When there are multiple zeros, the main performance is that the signal level is always low. Then there are several zeros in this series of signals, and the circuit will judge by the clock signal. During the low level, there are several zero clock signals. At present, clock signals are mostly edge triggered, that is, the rising edge or falling edge is valid. Of course, there are many kinds of clock signals. Less clock signal is inserted into the transmission signal, which is mainly used to control the clock signal generated by the receiving circuit to synchronize with the transmitting end.

It's a little messy I wonder if it will help you.

Too many codes make the clock signal extraction unstable. I think it has something to do with the circuit structure. Whenever a signal passes through some components or circuits, such as transistors or gates, there is always a certain delay when they work from one state to another. Anyway, various reasons will make the signal at the sending end and the clock at the receiving end out of sync, so the circuit will constantly adjust the clock to synchronize it with the signal at the sending end. There should be other reasons, but more than 0 yards will have many bad effects.