With the rapid development of optoelectronics and microelectronics manufacturing technology, electronic products are always developing in the direction of smaller, lighter and cheaper, so the packaging form of chip components is also constantly improved. There are various chip packaging technologies, including DIP, POFP, TSOP, BGA, QFP, CSP, etc. There are no less than thirty types, and they have experienced the development process from DIP, TSOP to BGA. Chip packaging technology has gone through several generations of changes. Its performance is becoming increasingly advanced, the ratio of chip area to packaging area is getting closer and closer, the applicable frequency is getting higher and higher, the temperature resistance performance is getting better and better, and the number of pins is increasing, leading to The distance between the feet is reduced, the weight is reduced, the reliability is improved, and the use is more convenient.
DIP packaging: In the 1970s of the last century, chip packaging basically used DIP (Dual ln-line Package, dual in-line package) packaging. This packaging form was suitable for PCB (printed circuit) at that time. Board) through-hole installation, wiring and operation are more convenient. There are various structural forms of DIP packages, including multi-layer ceramic dual-in-line DIP, single-layer ceramic dual-in-line DIP, lead frame DIP, etc. However, the packaging efficiency of DIP packaging is very low. The ratio of chip area to packaging area is 1:1.86. In this way, the area of ??the packaged product is larger. Ideally, the ratio of chip area to packaging area is 1:1. , but this cannot be achieved unless there is no packaging. However, with the development of packaging technology, this ratio is getting closer and closer, and now there is a packaging technology of 1:1.14.
TSOP packaging: In the 1980s, chip packaging technology TSOP appeared and was widely recognized by the industry. TSOP is the abbreviation of "Thin Small Outline Package", which means thin small size package. It is directly attached to the surface of the PCB board using SMT technology (Surface Mount Technology). When the TSOP package size is used, the parasitic parameters (output voltage disturbance caused when the current changes significantly) are reduced, which is suitable for high-frequency applications, is more convenient to operate, and has higher reliability. At the same time, TSOP packaging has the advantages of high yield and low price, so it has been widely used.
BGA packaging: With the advancement of technology in the 1990s, chip integration continued to increase, the number of I/O pins increased sharply, power consumption also increased, and the requirements for integrated circuit packaging also increased. More stringent. In order to meet the needs of development, BGA packaging began to be used in production. BGA is the abbreviation of English Ball Grid Array Package, that is, ball grid array package.
The I/O terminals of the BGA package are distributed under the package in the form of circular or columnar solder joints in an array. The advantage of BGA technology is that although the number of I/O pins has increased, the pin spacing has not. The reduction has increased instead, thus improving the assembly yield; although its power consumption has increased, BGA can be welded with a controlled collapse chip method, which can improve its electrothermal performance; both thickness and weight are better than previous packaging technologies. Reduce; the parasitic parameters are reduced, the signal transmission delay is small, and the frequency of use is greatly increased; the assembly can be welded on the front surface, and the reliability is high.
CSP package: CSP (Chip Scale Package) means chip-scale packaging. CSP packaging is the latest generation of chip packaging technology, and its technical performance has been further improved. CSP packaging can make the ratio of chip area to package area exceed 1:1.14, which is very close to the ideal situation of 1:1. The absolute size is only 32 square millimeters, which is about 1/3 of an ordinary BGA and is only equivalent to TSOP memory. 1/6 of the chip area. Compared with BGA packaging, CSP packaging can triple the storage capacity in the same space.
The center pin form of the CSP package effectively shortens the signal transmission distance, thereby reducing its attenuation, and the anti-interference and anti-noise performance of the chip can also be greatly improved. In the CSP packaging method, the chip is soldered to the PCB board through solder balls. Since the contact area between the solder joints and the PCB board is large, the heat generated by the chip during operation can be easily conducted to the PCB board. and spread out. The CSP package can dissipate heat from the back and has good thermal efficiency. The thermal resistance of CSP is 35℃/W, while the thermal resistance of TSOP is 40℃/W.